System and method for full range control of dual active bridge

ABSTRACT

A power converter includes primary and secondary bridges, a transformer, and a controller configured to generate a switching mode map that correlates each of a plurality of switching modes to a respective set of value ranges of system parameters of the power converter. The sets of system parameter value ranges are contiguous and non-overlapping across the switching mode map, each of the plurality of switching modes includes gate trigger voltage timings for commuting at least one of the primary and secondary bridges. The controller is configured to obtain a plurality of measured system parameter values, select from the switching mode map one of the plurality of switching modes that correlates to the set of system parameter values containing the plurality of measured system parameter values, and adjust gate trigger voltage timings of at least one of the primary and secondary bridges, according to the selected switching mode.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of and claims priority to U.S. patentapplication Ser. No. 16/125,131, which was filed 7 Sep. 2018, which is acontinuation of and claims priority to U.S. patent application Ser. No.14/547,178, which was filed 19 Nov. 2014, each of which is incorporatedherein by reference in its entirety.

BACKGROUND Technical Field

Embodiments of the invention relate generally to power converters.Particular embodiments relate to dual active bridge power converters.

DISCUSSION OF ART

Power supplies are electronic/electrical circuits that supply electricpower to one or more electric loads. The term “power supply” is mostcommonly applied to collections or an assembly of electrical devicesthat convert one form of electrical energy to another and are commonlyreferred to as “power converters.” Many power supplies include two ormore power converters connected together. Typically, power convertersare “switching” power converters, in which multiple solid state devicesare used to rapidly and intermittently interrupt or commutate an inputcurrent so as to effectuate conversion of the input current to an outputcurrent having different amplitude, voltage, and/or frequency. Forexample, a “DC power converter” produces output power at a substantiallyconstant output voltage and/or current.

Conventional power converters, generally, are groupings of plural solidstate switches that are connected to output terminals from a first DCinput terminal or from a second DC input terminal. The two DC terminalstypically are known jointly as a “DC link,” while the term “DC linkvoltage” often is used to refer to a potential difference across this DClink. Power conversion typically is a dynamic process that requiresrapidly sequenced changes in state of the solid state switches. Althoughthe switches exhibit high conduction or resistance in their closed oropen steady states, in transition between states the solid stateswitches typically exhibit capacitive and resistive “switching losses.”

Power converters can be designed on a dual active bridge (DAB) topologyto provide an adjustable bi-directional power flow between two isolatedDC links over a broad range of voltage ratio. Conventionally, power flowcontrol is achieved by adjusting only the phase shift between theprimary and the secondary side. This control is simple to implement andallows a large operating range. However, phase shift control can drivelarge currents inside the converter components when the output voltageratio is substantially different from the transformer ratio. The resultin higher conduction and switching losses of the semiconductors and thecurrent may also exceed the maximum current capability of the devices.Hence, the DAB may not be operable at certain voltage ratios even atreduced power levels. Accordingly, conventional DABs typically areoperated only in a relatively small voltage ratio range for which theyhave been designed. In the literatures, special operating modes areproposed that allow improved operation in some special operating points.Switching between modes transiently can have at least the followingadverse effects: discontinuities of the switching pattern (leading tounpredictable and possibly excessive electrical transients within theswitches), gaps in the operating range, different transfer gainsresulting in control instabilities.

BRIEF DESCRIPTION

Embodiments of the invention provide a power converter, which includesprimary and secondary bridges, a transformer, and a controllerconfigured to generate a switching mode map that correlates each of aplurality of switching modes to a respective set of value ranges ofsystem parameters of the power converter. The sets of system parametervalue ranges are contiguous and non-overlapping across the switchingmode map; each of the plurality of switching modes includes gate triggervoltage timings for commuting at least one of the primary and secondarybridges. The controller is configured to obtain a plurality of measuredsystem parameter values, select from the switching mode map one of theplurality of switching modes that correlates to the set of systemparameter values containing the plurality of measured system parametervalues, and adjust gate trigger voltage timings of at least one of theprimary and secondary bridges, according to the selected switching mode.

Other embodiments provide a controller that is configured to commuteprimary and secondary bridges of a dual active bridge power converter,according to any of a plurality of switching modes, in order to maintainsecondary link voltage and power requirements. The controller isconfigured to generate a switching mode map of system parameter valuesthat bound the plurality of switching modes, and is configured to selectfrom the switching mode map, based on measured values of systemparameters including at least primary link voltage and secondary linkvoltage, one of the plurality of switching modes that corresponds to atarget value of secondary link current. The controller also isconfigured to adjust gate trigger voltage timing according to theselected switching mode, in order to maintain a target value ofsecondary link voltage.

Other aspects of the invention relate to a method for controlling apower converter having primary and secondary bridges. The methodincludes generating a switching mode map that correlates each of aplurality of switching modes to a respective set of system parametervalue ranges, the sets of system parameter value ranges being contiguousand non-overlapping across the switching mode map; obtaining a pluralityof measured system parameter values; selecting from the switching modemap one of the plurality of switching modes that correlates to the setof system parameter value ranges containing the plurality of measuredsystem parameter values; and adjusting gate trigger voltage timingaccording to the selected switching mode, in order to maintain a targetvalue of power transferred between the primary and secondary bridges.

DRAWINGS

The invention will be better understood from reading the followingdescription of non-limiting embodiments, with reference to the attacheddrawings, wherein below:

FIG. 1 shows an electrical schematic of a dual active bridge powerconverter with a controller configured according to a first embodimentof the invention.

FIG. 2 shows a switching mode map and an exemplary mode graph SPSswitching implemented in the power converter shown in FIG. 1.

FIG. 3 shows a generalized control scheme implemented by the controllershown in FIG. 1, according to a first embodiment of the invention.

FIG. 4 shows a voltage controller implemented in the controller shown inFIG. 1, according to a first embodiment of the invention.

FIG. 5 shows equations implemented by the controller shown in FIG. 1 togenerate a switching mode map.

FIG. 6 shows equations implemented by the controller shown in FIG. 1 togenerate the switching mode map.

FIG. 7 shows switching mode maps for diverse values of secondary link DCvoltage, according to an embodiment of the invention.

FIG. 8 shows switching mode maps for diverse values of secondary link DCvoltage, according to an embodiment of the invention.

FIG. 9 shows switching mode maps for diverse values of secondary link DCvoltage, according to an embodiment of the invention.

FIG. 10 shows switching mode maps for diverse values of secondary linkDC voltage, according to an embodiment of the invention.

FIG. 11 shows a mode graph of diverse switching modes selectable by thecontroller from the switching maps shown in FIGS. 5-9.

FIG. 12 shows a mode graph of diverse switching modes selectable by thecontroller from the switching maps shown in FIGS. 5-9.

FIG. 13 shows a mode graph of diverse switching modes selectable by thecontroller from the switching maps shown in FIGS. 5-9.

FIG. 14 shows a mode graph of diverse switching modes selectable by thecontroller from the switching maps shown in FIGS. 5-9.

FIG. 15 shows a mode graph of diverse switching modes selectable by thecontroller from the switching maps shown in FIGS. 5-9.

FIG. 16 shows a mode graph of diverse switching modes selectable by thecontroller from the switching maps shown in FIGS. 5-9.

FIG. 17 shows a mode graph of diverse switching modes selectable by thecontroller from the switching maps shown in FIGS. 5-9.

FIG. 18 shows a mode graph of diverse switching modes selectable by thecontroller from the switching maps shown in FIGS. 5-9.

FIG. 19 shows equations implemented by the controller shown in FIG. 1 tocalculate gate trigger voltage timing according to various switchingmodes as shown in FIGS. 11-18.

FIG. 20 shows equations implemented by the controller shown in FIG. 1 tocalculate gate trigger voltage timing according to various switchingmodes as shown in FIGS. 11-18.

FIG. 21 shows a mode graphs of a transition between TR and BoT switchingmodes, according to a first embodiment of the invention.

FIG. 22 shows a mode graph of a transition between TR and BoT switchingmodes, according to a first embodiment of the invention.

FIG. 23 shows a mode graph of a transition between TR and BoT switchingmodes, according to a first embodiment of the invention.

FIG. 24 shows a mode graph of a transition between TR and BoT switchingmodes, according to a first embodiment of the invention.

FIG. 25 shows a mode graph of a transition between TR and BoT switchingmodes, according to a first embodiment of the invention.

FIG. 26 shows a mode graph of a transition between TR and BoT switchingmodes, according to a first embodiment of the invention.

FIG. 27 shows a mode graph of a transition between TR and BoT switchingmodes, according to a first embodiment of the invention.

FIG. 28 shows a mode graph of a transition between TR and BoT switchingmodes, according to a first embodiment of the invention.

FIG. 29 shows a mode graph of a transition between TR and BoT switchingmodes, according to a first embodiment of the invention.

FIG. 30 shows a mode graph of a transition between BoT, TR, and BuTswitching modes, according to a first embodiment of the invention.

FIG. 31 shows a mode graph of a transition between BoT, TR, and BuTswitching modes, according to a first embodiment of the invention.

FIG. 32 shows a mode graph of a transition between BoT, TR, and BuTswitching modes, according to a first embodiment of the invention.

FIG. 33 shows a mode graph of a transition between BoT, TR, and BuTswitching modes, according to a first embodiment of the invention.

FIG. 34 shows a mode graph of a transition between BoT, TR, and BuTswitching modes, according to a first embodiment of the invention.

FIG. 35 shows a mode graph of a transition between BoT, TR, and BuTswitching modes, according to a first embodiment of the invention.

FIG. 36 shows a mode graph of a transition between BoT, TR, and BuTswitching modes, according to a first embodiment of the invention.

FIG. 37 shows a mode graph of a transition between BoT, TR, and BuTswitching modes, according to a first embodiment of the invention.

FIG. 38 shows a mode graph of a transition between BoT, TR, and BuTswitching modes, according to a first embodiment of the invention.

FIG. 39 shows operating envelopes for various values of I_max.

DETAILED DESCRIPTION

Thus, according to aspects of the present invention, a generalizedcontrol scheme is provided that allows reduced loss operation across anenlarged voltage and power range including power flow reversal. Thegeneralized control scheme subdivides a voltage ratio/power plane intosubareas in which different modulation schemes are applied. In certainaspects, the modulation schemes include single-phase shift, trapezoidaltriple phase shift, trapezoidal dual phase shift, and triangular. Thedifferent schemes allow continuous operation across the voltage/powerplane.

Reference will be made below in detail to exemplary embodiments of theinvention, examples of which are illustrated in the accompanyingdrawings. Wherever possible, the same reference characters usedthroughout the drawings refer to the same or like parts, withoutduplicative description.

Aspects of the invention relate to reducing switching losses in powerconverters. As discussed above, selecting a switching mode that usesoptimal gate trigger voltage timing can reduce switching losses.

FIG. 1 illustrates an embodiment of the invention in which asingle-phase isolated bi-directional H-bridge power converter 100includes a plurality of semiconductor switches 101, 102, 103, 104, 105,106, 107, 108. Each switch 101-108 has a collector C, a gate G, and anemitter E. Each switch also has a corresponding freewheeling diode 111,112, 113, 114, 115, 116, 117, and 118, which is connected anti-parallelacross the collector C and the emitter E.

Switches 101, 102, 103, 104 and their freewheeling diodes 111, 112, 113,114 are arranged to form a primary bridge 120, and are “primaryswitches” (referring to switches of the primary bridge), while switches105, 106, 107, 108 and their freewheeling diodes 115, 116, 117, 118 arearranged to form a secondary bridge 122 and are “secondary switches”(referring to switches of the secondary bridge). The primary bridge 120is connected to commutate a DC supply voltage V1 or Vp to provide ACvoltage across, and AC current through, a primary coil 123 of atransformer 124. The secondary bridge 122 is connected to provide a DCload voltage V2 or Vs by commutating the AC voltage that is induced in asecondary coil 125 of the transformer 124. For smoothing, capacitors canbe attached across the outside legs of the primary and secondarybridges.

Notably, switch 105 is “homologous” to switch 101, in that switch 101 isconnected to the high terminal of the transformer primary coil 123 whileswitch 105 is connected to the high terminal of the transformersecondary coil 125, so that each of the switches in its own bridgefunctions similarly to the other switch in its other, respective bridge.Similarly, switches 102-106, 103-107, and 104-108 also are “homologous.”

Still referring to FIG. 1, a controller 130 is connected tointermittently supply and remove trigger voltages Vg1, Vg2, Vg3, Vg4,Vg5, Vg6, Vg7, Vg8 between each of the gates G and each of the emittersE associated with the switches 101-108, thereby switching ON or OFF eachswitch 101-108 in turn. The switches 101-108 are connected with thetransformer 124 to form a Dual-Active-Bridge (“DAB”) Topology, so thatthe switches can be commutated to provide an adjustable bi-directionalpower flow over a broad voltage ratio range between the electricallyisolated DC-links 132, 134. Conventionally, power flow is adjusted byvarying a phase shift between the trigger voltages of the homologousprimary and secondary switches (e.g. triggering switch 105 at varyingdelays before, or after, switch 101). The algorithm for varying phaseshift is known as a “switching mode.” For example, a “single phaseshift” (“SPS”) switching mode is simple to implement and has generallybeen considered as affording a large operating range.

The operating range afforded by SPS has an upper bound or Pmax, which isthe maximum power transferable through the transformer 124 with no “Zerovoltage time” (no time when the transformer windings 121, 125 are notconnected across the primary and secondary links 132, 134). For SPS, thefollowing equation applies:

Pmax_SPS=n*Vs*Vp/(8*fsw*Ls).

FIG. 2 shows a “mode graph” of exemplary waveforms of Vp (DC voltageapplied from primary link 132 across primary transformer winding 123),Vs (DC voltage applied from secondary link 134 across secondarytransformer winding 125), and Is (current flowing through the primarytransformer winding 125) for a particular implementation of SPSswitching. FIG. 2 also shows an exemplary switching mode map 200, of atype further discussed below with reference to FIGS. 5-8. Referring tothe mode graphs of FIG. 2, Dp indicates a duration, from time 0 untiltime .theta.2, when the transformer primary winding 123 is electricallyconnected with the primary DC link 132; time .theta.1 indicates thestarting time of a duration Ds when the transformer secondary winding125 is electrically connected with the secondary DC link 134; time .pi.(halfway through the switching cycle period 1/fsw_e) indicates the endof the duration Ds.

SPS switching can produce high currents within the converter switcheswhen the output voltage ratio is substantially different from thetransformer ratio. Each of the switches 101-108 has characteristicphysical limits (e.g., a peak current value), which constraincommutation of the switches. The high currents associated with SPSswitching can result in higher conduction and switching losses of thesemiconductors, and may even exceed maximum current capabilities of theswitches. However, by selecting different switching modes to vary thetiming at which Vg1-Vg8 are supplied, the controller 130 can effectcommutation of V1 or Vp to enhance operation under parameters notoptimal for SPS switching.

Accordingly, aspects of the present invention relate to a generalizedcontrol scheme 300 (shown schematically in FIG. 3), which is implementedin hard real time, across a wide voltage and power range (includingpower flow reversal), to select one of a plurality of switching modes inresponse to a change or changes in one or more measured electricalparameters including Vp_fbk (DC voltage across primary link 132) orVs_fbk (DC voltage across secondary link 134).

“Hard real time,” in context of the instant description, indicates aconstraint to select a switching mode within a single switching cycleafter a change of relevant parameters, where typical values (forexample) of switching frequency “fsw,” for practical implementations ofdual active bridge power converters, are between about 400 and about20.000 Hz. As used herein, the terms “substantially,” “generally,” and“about” indicate conditions within reasonably achievable manufacturingand assembly tolerances, relative to ideal desired conditions suitablefor achieving the functional purpose of a component or assembly.

According to embodiments of the present invention, as a step inimplementing the generalized control scheme 300 the controller 130identifies 302 a plurality of system constraints (including, e.g.,transformer leakage or stray inductance “Ls” referred to the primaryside, transformer turns ratio “n”, measured primary DC link voltage“Vp_fbk”, switching frequency “fsw_e” in switching cycles/second), whichmay in some embodiments be stored as digital data in an EEPROM or thelike data storage media. The controller 130 also receives 304 a targetvalue “Vs_ref” and a measured value “Vs_fbk” for DC voltage across thesecondary link 134. The target value Vs_ref and the measured valueVs_fbk may be continuously, periodically, or intermittently obtained “inreal time,” i.e. typically not less than once per switching cycle, ormore often as appropriate. Unless otherwise specified herein, othertarget or measured values also are obtained in real time.

Based on the system constraints and the received values, the controller130 establishes 306 a target value “Idc2_ref” for current to be suppliedat the secondary DC link 134. FIG. 4 illustrates a PI(proportional-integral) voltage controller 400 that is configured toestablish 306 I2dc_ref, based on comparison of target secondary linkvoltage Vs_ref to measured secondary link voltage Vs_fbk, inconsideration of switch current limits. The voltage controller 400receives variable input signals including a measured value Vs_fbk of DCload voltage, a target value Vs_ref for DC load voltage, and alsoreceives fixed parameters such as switching frequency fsw_e and controlcoefficients Kp, Ki, transformer leakage inductance Ls, transformerturns ratio n, and a current cap (physical limit of the switches101-108) I_max. Based on those various inputs, the voltage controller400 establishes 306 a target value of DC load current, Idc2_ref, asshown in FIG. 3. The voltage controller 400 may also incorporate fluxbalance control (not shown). By updating Idc2_ref and Vs_ref, thecontroller 400 maintains 309 a target value “P_ref” for net powertransfer.

At the same time, or in parallel, the controller 130 also generates 308a switching mode map based on system parameters {Vs_ref, Vp_fbk, etc.},according to equations 510 as shown in FIG. 5. FIGS. 6-9 show exemplaryswitching mode maps 600, 700, 800, 900 for various values of Vs_ref.Each switching mode map 600 etc. subdivides a plane of Vp_fbk/P_refcoordinates into subareas or switching mode regions, each regioncorresponding to a particular switching mode. Vp_fbk/P_ref coordinatesare typical because targeted net power transfer “P_ref” is the parameterof greatest interest, and can be determined 309 according to:

P_ref=Vs_ref×Idc2_ref.

In exemplary embodiments, the switching modes include: a “triple phaseshift trapezoidal” (“TR”) mode, in which the primary and secondarybridges 120, 122 are triggered to produce Vp, Vs, and I2 waveforms asshown in the mode graph of FIG. 10; a “triple phase shift buck saturatedtrapezoidal” (“BuST”) mode, as shown in the mode graph of FIG. 11; a“triple phase shift boost triangular” (“BoT”) mode, as shown in the modegraph of FIG. 12; and a “triple phase shift buck triangular” (“BuT”)mode, as shown in the mode graph of FIG. 13. For a switching mode mapcorresponding to a given value of Vs, an upper boundary of eachswitching mode region is defined by a maximum power Pmax that isachievable using that switching mode. FIG. 5 shows equations forcalculating Pmax, for each of the switching modes; for generating 308 aswitching mode map based on Pmax values; and for identifying 310 anoptimal switching mode region.

Referring to FIGS. 3, 5, and 6, the controller 130 uses the establishedvalues of {Vp_fbk, P_ref} to select 310 from the generated switchingmode map an optimal algorithm or switching mode (SPS, TR, BoT, BuT, orBuST) for calculating 320 gate trigger voltage timing based on systemparameters {Vp_fbk, Vs_ref, P_ref}. For example, the controller 130generates 308 the entire mode map, and uses {Vp_fbk, Idc2_ref} to locate312 a point {Vp_fbk, P_ref} on the map and to thereby select 310 theswitching mode in which that point is found. Alternatively, thecontroller 130 may first identify a general region of the point {Vp_fbk,P_ref} (e.g., to the left or right of an “equal” voltage lineVp_fbk=Vs_fbk/n). Having identified a general region, the controller 130then may generate only that part of a switching mode map that is withinthe general region (e.g., if {Vp_fbk, P_ref} is to the left of the equalvoltage line, then the controller will generate Pmax boundaries only forBoT and TR switching modes; BuT and BuST would not be found to the leftof this line). By comparing the point {Vp_fbk, P_ref} to the generatedsubset of Pmax boundaries, the controller 130 then can select 310 whichswitching mode region contains the point.

Notably, several of the switching modes are “compatible,” which meansthat under the parameters {Vs_ref, Vp_fbk, P_ref} defining the moderegion boundaries, each of the adjacent switching modes produces“borderline waveforms” of Ip and of Is that are identical to theborderline waveforms produced by the other adjacent switching mode underthe same set of parameters. For example, BoT, TR, and BuT switchingmodes are compatible as shown in FIGS. 15-16. Compatibility between theswitching modes enables on-the-fly transitions without concern forphase-shifting gate trigger voltage steps. On the other hand, althoughBuST is not compatible with TR, it is possible to time transitionsbetween these modes so that the gate trigger voltages are removed orapplied at zero-current conditions. Indeed, each of the switching modescan be designed such that transformer current is equal to zero amps atthe beginning/end of each switching cycle.

Subsequently, the controller 130 calculates 320 gate trigger voltagetiming signals Vg1-Vg8, according to a set of trigger voltage timingequations (shown in FIGS. 19 and 20) as defined by the selectedswitching mode. For each switching mode, the corresponding set oftrigger voltage timing equations 320 is defined such that a target DCvoltage (Vs_ref) is maintained at the secondary link 134 while currentsand voltages across the switches 101-108 do not exceed theircharacteristic physical limits; and such that, at each boundary witheach adjacent switching mode, the trigger voltage timing equations ofthe adjacent switching modes produce compatible waveforms as discussedabove. Based on the calculations 320, the controller 130 then adjuststhe gate trigger voltage timing. For example, maximum power flow betweenthe links 132, 134 (via the transformer 124) can be limited to a valuethat corresponds to a maximum peak value of the transformer current; orto a value that corresponds to a physical limit (e.g., heat dissipation,thermal strain, etc.) of one of the components (e.g., a diode, a switch,etc.).

Optionally, in calculating 320 the gate trigger voltage timing, thecontroller 130 offsets 315 the gate voltage trigger timing signals bytime offsets Dp_off, Ds_off to produce a dc-offset voltage to regulatethe offset currents in the transformer. For example, the controller 130would offset 315 the primary bridge trigger signal waveforms Vg1 . . .Vg4, according to the primary switching offset Dp_Off, and also wouldoffset 315 the secondary trigger signal waveforms Vg5 . . . Vg8,according to the secondary switching offset Ds_Off.

As another option, in at least one of the switching modes, thecontroller 130 may exchange switching patterns among switches within abridge on consecutive switching cycles. In other words, during a firstswitching cycle switch 101 may be switched under current while switch103 is switched at zero amps; then, during a next switching cycle,switch 101 will be switched at zero amps while switch 103 is switchedunder current. Such exchange of switching patterns can extend componentlife by providing thermal “rest” periods.

FIGS. 19 and 20 show equations 321 that are used by the controller 130for calculating 320 gate trigger voltage timing under each of the SPS,TR, BoT, BuT, or BuST switching modes. Instead of implementing theseequations on-the-fly, the controller 130 may instead refer to andinterpolate among pre-set lookup tables. Those of ordinary skill willappreciate equivalent modes of calculating gate trigger voltage timing.

In FIGS. 19 and 20, and throughout unless otherwise defined in context,“fsw” represents switching frequency; “Ls” represents the leakageinductance of the transformer; “Vp” or “V1” represents DC supplyvoltage; “Vs” or “V2” represents DC load voltage; “n” representstransformer windings turns ratio; “Idc_ref” represents a setpoint valueof DC load current; “ptDead” represents a design value of transition or“dead” time for each switch in the power converter; “T1” through “T8”refer to switching times of the eight switches in the power converter,in other words, the times when the gate trigger voltages Vg1-Vg8 areapplied or removed from the switches; “_ref” indicates a target orsetpoint value; “_fbk” indicates a measured value.

FIGS. 21 through 29 illustrate a transition from TR switching mode toBOT switching mode, wherein it is apparent the two switching modesproduce compatible waveforms at the switching mode boundary conditions.Similarly, FIGS. 30 through 38 illustrate smooth transitions among BOT,TR, and BUT switching modes.

FIG. 39 illustrates operating envelopes, within an exemplary switchingmode map, for various values of individual switch current limit I_lim.

Also of note, a switching mode map can be determined 308 based solely onnon-variable system parameters (e.g., Ls,n; fsw_e); or, as describedabove, incorporating at least one variable system parameter (e.g.,Vs_fbk). Thus, generating 308 a switching mode map can be accomplishedeither a priori, or in hard real time; so that it is possible to reducethe hard real time process to identifying 302 Vp_fbk, determining 309P_ref, selecting 310 a switching mode, and then calculating 320 gatetrigger voltage timing.

Thus, embodiments of the invention provide a power converter, whichincludes primary and secondary bridges and a transformer, as well as acontroller that is configured to generate a switching mode map thatcorrelates each of a plurality of switching modes to a respective set ofvalue ranges of system parameters of the power converter, the sets ofsystem parameter value ranges being contiguous and non-overlappingacross the switching mode map, each of the plurality of switching modesincluding a set of gate trigger voltage timings for commuting at leastone of the primary and secondary bridges. The controller is furtherconfigured to periodically implement a switching cycle that includesobtaining a plurality of measured system parameter values, selectingfrom the switching mode map one of the plurality of switching modes thatcorrelates to the set of system parameter values containing theplurality of measured system parameter values, and adjusting gatetrigger voltage timings of at least one of the primary and secondarybridges, according to the selected switching mode.

In certain embodiments, each of the switching modes defines a respectiveset of trigger voltage timing equations, and at least one pair of theplurality of switching modes that are mutually contiguous have theirrespective sets of trigger voltage timing equations defined to producemutually compatible waveforms of primary and secondary transformerwinding voltages (Vp, Vs) at a boundary of the mutually contiguousswitching modes. In certain embodiments, at least one of the switchingmodes is designed such that a transformer current of the transformer isequal to zero amperes at a beginning and at an end of a switching cyclein which a new switching mode is selected. In certain embodiments, theswitching modes include at least two of a single phase shift (SPS) mode,a triple phase shift trapezoidal (TR) mode, a triple phase shift boosttrapezoidal (BoT) mode, a triple phase shift buck trapezoidal (BuT)mode, or a triple phase shift saturated buck trapezoidal (BuST) mode. Incertain embodiments, the controller is configured to generate theswitching mode map in hard real time based on at least one of theplurality of measured system parameter values. In certain embodiments,the controller is configured to generate only a selected portion of theswitching mode map, and to select the portion of the switching mode mapin hard real time based on at least measured values of secondary windingvoltage and of primary winding voltage. In certain embodiments, amaximum power flow through the power converter is limited to a valuethat corresponds to a maximum designed value of current through thetransformer. In certain embodiments, on consecutive switching cycles atleast one of the modes exchanges switching patterns among switcheswithin at least one of the primary bridge or the secondary bridge. Incertain embodiments, the controller is configured to obtain, select, andadjust in hard real time.

In other embodiments, a controller for a power converter is configuredto commute primary and secondary bridges of the power converter,according to any of a plurality of switching modes, in order to maintainsecondary link voltage and power requirements. The controller isconfigured to generate a switching mode map of system parameter valuesthat bound the plurality of switching modes, and is configured to selectfrom the switching mode map, based on measured values of systemparameters including at least primary link voltage and secondary linkvoltage, one of the plurality of switching modes that corresponds to atarget value of secondary link current. The controller also isconfigured to adjust gate trigger voltage timings of the primary andsecondary bridges, according to said one of the plurality of switchingmodes that is selected, in order to maintain a target value of secondarylink voltage. In certain embodiments, each of the switching modesdefines a set of trigger voltage timing equations, and at least one pairof mutually contiguous switching modes have their respective sets oftrigger voltage timing equations defined to produce mutually compatiblewaveforms of primary and secondary transformer winding voltage at aboundary of the mutually contiguous switching modes. In certainembodiments, the switching modes include at least two of a single phaseshift (SPS) mode, a triple phase shift trapezoidal (TR) mode, a triplephase shift boost trapezoidal (BoT) mode, a triple phase shift bucktrapezoidal (BuT) mode, or a triple phase shift saturated bucktrapezoidal (BuST) mode. In certain embodiments, the controller isconfigured to generate the switching mode map in hard real time based onat least one of the plurality of measured values of system parameters.In certain embodiments, the controller is configured to generate only aselected portion of the switching mode map, and to select the portion ofthe switching mode map in hard real time based on at least measuredvalues of secondary winding voltage and of primary winding voltage. Incertain embodiments, a maximum power flow through the power converter islimited to a value that corresponds to a maximum designed value ofcurrent through the transformer. In certain embodiments, at least one ofthe modes exchanges switching patterns among switches within a bridge onconsecutive switching cycles. In certain embodiments, the controller isconfigured to select and adjust in hard real time.

Some aspects of the invention provide a method for controlling a powerconverter having primary and secondary bridges. The method includesgenerating a switching mode map that correlates each of a plurality ofswitching modes to a respective set of system parameter value ranges,the sets of system parameter value ranges being contiguous andnon-overlapping across the switching mode map; obtaining a plurality ofmeasured system parameter values; selecting from the switching mode mapone of the plurality of switching modes that correlates to the set ofsystem parameter value ranges containing the plurality of measuredsystem parameter values; and adjusting gate trigger voltage timingaccording to the selected switching mode, in order to maintain a targetvalue of power transferred between the primary and secondary bridges. Incertain aspects, each of the switching modes defines a set of triggervoltage timing equations, and at least one pair of the switching modesthat are mutually contiguous have their respective sets of triggervoltage timing equations defined to produce mutually compatiblewaveforms of primary and secondary transformer winding voltage at aboundary of the mutually contiguous switching modes. In certain aspects,the switching modes include at least two of a single phase shift (SPS)mode, a triple phase shift trapezoidal (TR) mode, a triple phase shiftboost trapezoidal (BoT) mode, a triple phase shift buck trapezoidal(BuT) mode, or a triple phase shift saturated buck (BuST) trapezoidalmode. In certain aspects, at least a part of the switching mode map isgenerated in hard real time based on at least one of the plurality ofmeasured system parameter values. For example, only a selected portionof the switching mode map is generated, and the portion of the switchingmode map is selected in hard real time based on at least measured valuesof secondary winding voltage and of primary winding voltage. In certainaspects, a maximum power flow through the power converter is limited toa value that corresponds to a maximum designed value of current throughthe transformer. In certain aspects, when the power converter iscontrolled according to at least one of the switching modes, switchingpatterns are exchanged among switches within at least one of the primarybridge or the secondary bridge on consecutive switching cycles. Incertain aspects, selecting and adjusting are accomplished in hard realtime.

It is to be understood that the above description is intended to beillustrative, and not restrictive. For example, the above-describedembodiments (and/or aspects thereof) may be used in combination witheach other. In addition, many modifications may be made to adapt aparticular situation or material to the teachings of the inventionwithout departing from its scope. While the dimensions and types ofmaterials described herein are intended to define the parameters of theinvention, they are by no means limiting and are exemplary embodiments.Many other embodiments will be apparent to those of skill in the artupon reviewing the above description. The scope of the invention should,therefore, be determined with reference to the appended claims, alongwith the full scope of equivalents to which such claims are entitled. Inthe appended claims, the terms “including” and “in which” are used asthe plain-English equivalents of the respective terms “comprising” and“wherein.” Moreover, in the following claims, terms such as “first,”“second,” “third,” “upper,” “lower,” “bottom,” “top,” etc. are usedmerely as labels, and are not intended to impose numerical or positionalrequirements on their objects. Further, the limitations of the followingclaims are not written in means-plus-function format and are notintended to be interpreted based on 35 U.S.C. § 112, sixth paragraph,unless and until such claim limitations expressly use the phrase “meansfor” followed by a statement of function void of further structure.

This written description uses examples to disclose several embodimentsof the invention, including the best mode, and also to enable one ofordinary skill in the art to practice embodiments of the invention,including making and using any devices or systems and performing anyincorporated methods. The patentable scope of the invention is definedby the claims, and may include other examples that occur to one ofordinary skill in the art. Such other examples are intended to be withinthe scope of the claims if they have structural elements that do notdiffer from the literal language of the claims, or if they includeequivalent structural elements with insubstantial differences from theliteral language of the claims.

As used herein, an element or step recited in the singular and proceededwith the word “a” or “an” should be understood as not excluding pluralof the elements or steps, unless such exclusion is explicitly stated.Furthermore, references to “one embodiment” of the present invention arenot intended to be interpreted as excluding the existence of additionalembodiments that also incorporate the recited features. Moreover, unlessexplicitly stated to the contrary, embodiments “comprising,”“including,” or “having” an element or a plurality of elements having aparticular property may include additional such elements not having thatproperty.

Since certain changes may be made in the above-described embodiments,without departing from the spirit and scope of the invention hereininvolved, it is intended that all of the subject matter of the abovedescription or shown in the accompanying drawings shall be interpretedmerely as examples illustrating the inventive concept herein and shallnot be construed as limiting the invention.

What is claimed is:
 1. A power converter comprising: a primary bridgeand a secondary bridge; a transformer having a primary side and asecondary side, the primary bridge being connected to the primary sideof the transformer and the secondary bridge being connected to thesecondary side of the transformer; and a controller configured togenerate a switching mode map that correlates each of a plurality ofswitching modes to a respective set of value ranges of system parametersof the power converter, each of the plurality of switching modesincluding a respective set of gate trigger voltage timings for commutingthe primary bridge and the secondary bridge; the controller furtherconfigured to: determine a target power transfer based on a target DCvoltage of the secondary bridge and a target current of the secondarybridge; select from the switching mode map a first switching mode of theplurality of switching modes that correlates to the set of systemparameter value ranges containing a measured DC voltage of the primarybridge and the target power transfer; adjust gate trigger voltagetimings of the primary bridge and the secondary bridge based on thefirst switching mode, to transfer power between the primary bridge andthe secondary bridge across the transformer; determine a change in atleast one of the measured DC voltage of the primary bridge or a measuredDC voltage of the secondary bridge; select a different, second one ofany of the other plurality of switching modes from the switching modemap responsive to the change that is determined; and adjust the gatetrigger voltage timings of the primary bridge and the secondary bridgebased on the second switching mode.
 2. The power converter of claim 1,wherein the sets of system parameter value ranges are contiguous andnon-overlapping across the switching mode map.
 3. The power converter ofclaim 1, wherein two or more of the plurality of switching modes arecompatible switching modes, wherein the compatible switching modes thatare mutually contiguous have their respective sets of trigger voltagetiming equations defined to produce mutually compatible waveforms oftransformer winding voltages at boundaries of the mutually contiguousswitching modes;
 4. The power converter of claim 1, wherein thecontroller is further configured, responsive to the first switching modeand the second switching mode not being compatible switching modes, totime transitions between the first switching mode and the secondswitching mode so that gate trigger voltages of the first switching modeand the second switching mode are at least one of removed or applied atzero-current conditions.
 5. A power converter comprising: a primarybridge and a secondary bridge; a transformer having a primary side and asecondary side, the primary bridge being connected to the primary sideof the transformer and the secondary bridge being connected to thesecondary side of the transformer; and a controller configured togenerate a switching mode map that correlates each of a plurality ofswitching modes to a respective set of value ranges of system parametersof the power converter, the sets of system parameter value ranges beingcontiguous and non-overlapping across the switching mode map, each ofthe plurality of switching modes including a respective set of gatetrigger voltage timings for commuting the primary bridge and thesecondary bridge; the controller further configured to: determine atarget power transfer based on a target DC voltage of the secondarybridge and a target current of the secondary bridge; and select from theswitching mode map a first switching mode of the plurality of switchingmodes that correlates to the set of system parameter value rangescontaining a measured DC voltage of the primary bridge and the targetpower transfer.
 6. The power converter of claim 5, wherein thecontroller is further configured to adjust gate trigger voltage timingsof the primary bridge and the secondary bridge based on the firstswitching mode, to transfer power between the primary bridge and thesecondary bridge across the transformer.
 7. The power converter of claim6, wherein the controller is further configured to determine a change inat least one of the measured DC voltage of the primary bridge or ameasured DC voltage of the secondary bridge.
 8. The power converter ofclaim 7, wherein the controller is further configured to select adifferent, second one of any of the other plurality of switching modesfrom the switching mode map responsive to the change that is determined.9. The power converter of claim 8, wherein the controller is furtherconfigured to adjust the gate trigger voltage timings of the primarybridge and the secondary bridge based on the second switching mode. 10.The power converter of claim 5, wherein two or more of the plurality ofswitching modes are compatible switching modes, wherein the compatibleswitching modes that are mutually contiguous have respective sets oftrigger voltage timing equations defined to produce mutually compatiblewaveforms of transformer winding voltages at boundaries of the mutuallycontiguous switching modes;
 11. The power converter of claim 10, whereinthe controller is further configured, responsive to the first switchingmode and a second switching mode not being compatible switching modes,to time transitions between the first switching mode and the secondswitching mode so that gate trigger voltages of the first switching modeand the second switching mode are at least one of removed or applied atzero-current conditions.
 12. A power converter comprising: a primarybridge and a secondary bridge; a transformer having a primary side and asecondary side, the primary bridge being connected to the primary sideof the transformer and the secondary bridge being connected to thesecondary side of the transformer; and a controller configured togenerate a switching mode map that correlates each of a plurality ofswitching modes to a respective set of value ranges of system parametersof the power converter, the sets of system parameter value ranges beingcontiguous and non-overlapping across the switching mode map, each ofthe plurality of switching modes including a respective set of gatetrigger voltage timings for commuting the primary bridge and thesecondary bridge.
 13. The power converter of claim 12, wherein thecontroller is further configured to determine a target power transferbased on a target DC voltage of the secondary bridge and a targetcurrent of the secondary bridge.
 14. The power converter of claim 12,wherein the controller is further configured to select from theswitching mode map a first switching mode of the plurality of switchingmodes that correlates to the set of system parameter value rangescontaining a measured DC voltage of the primary bridge.
 15. The powerconverter of claim 12, wherein the controller is further configured toadjust gate trigger voltage timings of the primary bridge and thesecondary bridge based on a first switching mode, to transfer powerbetween the primary bridge and the secondary bridge across thetransformer.
 16. The power converter of claim 12, wherein the controlleris further configured to determine a change in at least one of ameasured DC voltage of the primary bridge or a measured DC voltage ofthe secondary bridge.
 17. The power converter of claim 12, wherein thecontroller is further configured to select a different, second one ofany of the other plurality of switching modes from the switching modemap responsive to a change in at least one of a measured DC voltage ofthe primary bridge or a measured DC voltage of the secondary bridge. 18.The power converter of claim 12, wherein the controller is furtherconfigured to adjust the gate trigger voltage timings of the primarybridge and the secondary bridge based on a second switching mode. 19.The power converter of claim 12, wherein two or more of the plurality ofswitching modes are compatible switching modes, wherein the compatibleswitching modes that are mutually contiguous have respective sets oftrigger voltage timing equations defined to produce mutually compatiblewaveforms of transformer winding voltages at boundaries of the mutuallycontiguous switching modes.
 20. The power converter of claim 12, whereinthe controller is further configured, responsive to a first switchingmode and a second switching mode not being compatible switching modes,to time transitions between the first switching mode and the secondswitching mode so that gate trigger voltages of the first switching modeand the second switching mode are at least one of removed or applied atzero-current conditions.